|Elliott Sound Products||Project 67|
There have been many attempts to create a Voltage Controlled Amplifier / Attenuator (VCA) that is both fast and linear, and many fine examples exist. Unfortunately, many of these are relatively expensive or are difficult to get (or both), and the cheaper ones often just don't seem to make the grade for one reason or another. For those interested in the various gain control topologies that have been used for compressors and limiters, see VCA Techniques.
The majority of simple VCA circuits have a limited input voltage range, with some exhibiting excessive distortion if the input voltage exceeds as little as 10mV. At such a low signal voltage, noise then becomes a major problem, as well as control voltage 'feed-through'. This latter effect shows up as very low frequencies being generated by the circuit, and this can easily overload the power amplifier under some circumstances. It is almost a given that these very circumstances will be present when you least expect or need your subwoofer to 'bottom out'.
A Light Dependent Resistor (LDR) is an excellent (and very low distortion) variable resistance, but most are too slow, and allow a maximum attack time of about 15ms. For many applications, the LDR / LED combination will be quite acceptable (for example with electric guitar or bass), but for stopping an analogue to digital converter from clipping, you really need something faster.
The circuit devised by Phil Allison still has some input voltage limitations, since it is based on a FET. Junction FET VCAs also create considerable distortion, with the worst of it appearing when the signal is attenuated by 6dB. The common way to fix this problem is to apply 1/2 of the drain voltage to the gate, along with the control voltage. Figure 1 shows the conventional way this is done. The predominantly second harmonic distortion is converted by this technique, to become a very much reduced amount of third harmonic distortion. This is further reduced by ensuring that the signal voltage between drain and source is less than 100mV, but the exact voltage is dependent on the FET used.
Figure 1 - 'Conventional' VCA Using a JFET
The arrangement shown looks perfectly reasonable when you first see it, but closer examination reveals that the two 1M resistors form a voltage divider for the control voltage (CV), and this exists until the 100nF cap is charged. The maximum attack time is limited, with a time constant of 100ms as shown. Figure 1 is adapted (for comparative purposes only) from a published circuit by a well respected designer .
The circuit is only useful if large peaks in signal level are tolerable. If they are, a peak limiter is probably not needed anyway .
The 25k pot is used to adjust the limiting threshold, which is useful in some circuit configurations.
This audio peak limiter employs a FET as a variable resistance to attenuate the input signal according to a control voltage (CV). It offers unusually good performance with low cost and component count. A TL072 dual opamp (U1) provides the circuit gain and full wave peak detection.
The 4.7K resistor and 1µF capacitor (R14 and C5) determine the attack time, which is about 5ms as shown. R12 and C5 determine the release or recovery time, and as shown this is approximately 1 second.
R11, C3, C4 and R13 form the distortion cancelling circuit, and as can be seen, the control voltage impedance is very low compared to the distortion cancellation impedance, so the circuit's attack time is not compromised. The values of resistance and capacitance have been optimised for the least distortion across the audio band, at 0.3% THD typical for frequencies above around 500 Hz, at 1.65V RMS output level. Below 500 Hz, the distortion rises gently with decreasing frequency, but also falls with lower voltages. Distortion is negligible at any voltage level below the limiting threshold.
Figure 2 - Fast Audio Peak Limiter
As described above, the attack time with the values shown is 5ms, with a release time of around 1 second. This is a good compromise for most audio material, but is readily changed by altering the values of R14 (attack) and R12 (release). Be careful of values for R14 of less than 1k, as the opamp will be unable to supply the current needed to charge C5. Ideally, C5 needs to be a low leakage capacitor - either a low leakage electrolytic or a tantalum if you must (although I never recommend tantalum for anything). A standard electro is probably inappropriate for this circuit, especially if longer release times are desired. Having said that, most are better than you may have been led to expect.
In addition, keep R12 a minimum of 10 times R14 ... for example, if R14 were to be 1k, the minimum value for R12 will be 10k. This would be a very fast limiter indeed! Faster decay is possible, but it doesn't sound nice. The circuit has been changed so that R12 (decay control) is connected to the diode side of R14, so if a fast decay is needed the control voltage is not attenuated.
|Noise Level (unweighted)||-80dB (ref. 1.65V RMS output)|
|Typical Max. Output Level||1.65V RMS|
|FET Voltage (at max. o/p)||< 45mV typical)|
|Distortion||< 0.5% typical|
Figure 3 shows an optional Schmitt trigger indicator circuit. This will indicate the limiting is taking place, with the LED illuminating at approximately 1 dB attenuation, which occurs with a control voltage signal of 1.6V.
Figure 3 - Optional Schmitt Trigger Indicator
If desired, a LED VU meter may be used here instead, and with proper calibration will give a good indication of the peak attenuation at any time. This option will require some experimentation from the constructor, and further details are up to the individual to work out.
This circuit is a vast improvement on the conventional approach as shown in Figure 1. With that circuit, any attempt to make the attack time shorter than about 20ms may create nasty clicks in the signal, as the FET only gets half the initial control voltage during the time it takes to charge the distortion cancellation capacitor. As a result, the attenuation is greatly reduced during this critical period, and the transient is allowed through almost unaffected by the FET.
The resulting 'fight' between the FET and control voltage amplifier circuit can also cause the signal level to be reduced too far initially (after the transient), after which it must then recover. The overall effect is not at all pleasant, and is best avoided. (Note the careful use of gross understatement!) It is precisely this sort of problem that has given some limiters a bad name over the years.
The descriptive text is a mixture of Phil's original description and some additional information provided by ESP.
|Copyright Notice. This article, including but not limited to all text and diagrams, is the intellectual property of Phil Allison and Rod Elliott, and is Copyright © 2000. Reproduction or re-publication by any means whatsoever, whether electronic, mechanical or electro- mechanical, is strictly prohibited under International Copyright laws. The author (Phil Allison) and editor (Rod Elliott) grant the reader the right to use this information for personal use only, and further allows that one (1) copy may be made for reference while constructing the project. Commercial use is prohibited without express written authorisation from Phil Allison and Rod Elliott.|